ICNP-95 Final Program

Wednesday, November 8, 1995:

Opening Session (9:00-10:30 a.m.)(Hall)

Refreshment Break (10:30-11:00 a.m.)

Session 1A: Formal Methods (11:00-12:30)(Room A)

Session Co-Chairs:

David Lee, AT&T Bell Labs, U.S.A.

Koji Okada, ETL, Japan

1. Generalized Fair Reachability Analysis for Cyclic Protocols with Nondeterminism and In ternal Transitions H. Liu and R. E. Miller, University of Maryland at College Park, U.S.A.
2. Algorithms for the Verification and Diagnosis of Testing Equivalence and Reduction Rel ation Z. P. Tao, G. v. Bochmann, and R. Dssouli, Universite de Montreal, Canada
3. Similarity for Reuse of Specification in Communication Software Development U. Yamamoto, E. Lee and N. Shiratori, Tohoku University, Japan

Session 1B: ATM Bandwidth Assignments(Room B)

Session Co-Chairs:

Kenichiro Mori, Omron, Japan

Wei Zhao, Texas A&M University, U.S.A.

1. A Dynamic Bandwidth Allocation Scheme for Multimedia Data over ATM Network H. Zhou and C. H. Chang, Tufts University, U.S.A.
2. Design and Performance Analysis of a Real-time Bandwidth Assignment Technique I. Ryoo, H. Aida and T. Saito, The University of Tokyo, Japan
3. On Guaranteed Bandwidth Channels S. Chaudhry, M. Raziuddin, and A. Choudhary, Syracuse University, U.S.A.

Lunch Break (12:30-2:00 p.m.)

Session 2A: Protocol Synthesis (2:00-3:30 p.m.)(Room A)

Session Co-Chairs:

Eric W.S. Chen, National Chung Hsing Univ., Taiwan

Yutaka Hiragawa, NTT, Japan

1. A Protocol Synthesis Algorithm: A Relational Approach K. Zeroual and M. E. Yassini, Universite de Sherbrooke, Canada
2. Extension of Protocol Synthesis to Structured Entities B. B. Bista, A. Togashi and N. Shiratori, Tohoku University, Japan
3. Protocol Synthesis from Timed and Structured Specifications A. Nakata, T. Higashino, K. Taniguchi, Osaka University, Japan

Session 2B: ATM Switch Design(Room B)

Session Co-Chairs:

Yukio Hiramatsu, NTT, Japan

Han Zhou, Tufts University, U.S.A

1. Multicast Function in ATM Switches J. Li and C.-L. Wu, University of Texas at Austin, U.S.A.
2. Design of ATM Switch Using Hypercube with Distributed Shared Input Buffers and Dedicat ed Output Buffers D. C. W. Pao and W. N. Chau, City University of Hong Kong, Hong Kong
3. Performance Analysis of an ATM Switch with Multiple Paths B. Kim, B. Kim, J. Jim, H. Yoon, and J. Cho, Korean Advanced Institute of Science and Tech nology, Korea

Refreshment Break (3:30-4:00 p.m.)

Session 3A: Formal Description Techniques (4:00-5:30 p.m.)(Room A)

Session Co-Chairs:

Yanghee Choi, Seoul National University, Korea

Yoshiaki Kakuda, Osaka University, Japan

1. Validation of Distributed Algorithms and Protocols Q. Gao, R. Groz, G. v. Bochmann, J. Dargham and E. H. Htite, Universite de Montreal, Canad a
2. Protocol Visualization using LOTOS Multi-Rendezvous Mechanism K. Yasumoto, T. Higashino, T. Matsuura, and K. Taniguchi Osaka University, Japan
3. Protocol Synthesis using Basic LOTOS and Global Variables A. Khoumsi, and G. v. Bochmann, Universite de Montreal, Canada

Session 3B: ATM Traffic Control(Room B)

Session Co-Chairs:

Kuninobu Tanno, Yamagata University, Japan

Hyunsoo Yoon, KAIST, Korea

1. A Fuzzy Decision Maker for Source Traffic in High Speed Networks V. Catania, G. Ficili, S. Palazzo, and D. Panno, Universita di Catania, Italy
2. ATM Admission Models of Stochastic High Level Petri Nets Based on Hierarchical Modelin g C. Lin and S. Chanson, Hong Kong University of Science and Technology, Hong Kong
3. Using Traffic Regulation To Meet End-to-End Deadlines in ATM Networks A. Raha, S. Kamat, and W. Zhao, Texas A&M University, U.S.A.

Reception (6:00-8:00 p.m.)